Is the pure existance of a `&[u32]` and `&mut [u32]` to the same data already considered undefined behaviour?
I am in the process of implementing an SPI driver. Now I have the following driver code (MRE-ified): use tokio::{join, sync::mpsc}; async fn spi_transmit(write_buf: &[u32], read_buf: &mut [u32]) { assert_eq!(read_buf.len(), write_buf.len()); let (write_fifo, mut read_fifo) = mpsc::channel(2); let write_task = async { // Simulate an SPI bus that respondes with the sent data + 20,… Read More Is the pure existance of a `&[u32]` and `&mut [u32]` to the same data already considered undefined behaviour?