I’m making an FTP server from scratch in C. I need a makefile to compile.
his is the architecture of my project :
/ include / header file (*.h) src / potential sub directories / *.c *.c main.c Makefile
this is my makefile :
SRC := main.c $(wildcard src/*.c) $(wildcard src/**/*.c) OBJ := $(SRC:%.c=obj/%.o) DEP := $(DEP:%.c=dep/%.d) CC ?= gcc CPPFLAGS := -Iinclude CFLAGS := LDFLAGS := LDLIBS := all: myftp myftp: $(OBJ) @$(CC) -o $@ $(CFLAGS) $^ $(LDFLAGS) $(LDLIBS) @echo -e "\e[1;32mLinked '$@'\e[0m" obj/%.o dep/%.d: src/%.c mkdir -p $(@D) $(@D:obj/%=dep/%) @$(CC) -c -o 'obj/$*.o' $(CFLAGS) $(CPPFLAGS) -MD -MF 'dep/$*.d' -MQ 'obj/$*.o' $< @echo -e "\e[32mBuilt '$@'\e[0m" clean: @echo -ne '\e[31m' @rm -vr obj dep @echo -ne '\e[0m' fclean: clean @echo -ne '\e[1;31m' @rm -v my_ftp @echo -ne '\e[0m' re: fclean all -include $(DEP)
When I do the make command this is the error message :
make: *** No rule to make target 'obj/main.o', needed by 'myftp'. Stop.
I try to modify the line :
OBJ := $(SRC:%.c=obj/%.o)
like this :
OBJ := $(SRC:%.c=%.o).
With this modification, the compilation work but all the .o and .d files are in the same directories as the .c file and not in other directories that recreate the project’s architecture but only for the .o and .d files. Like that :
/ obj / main.o src / the other .o files dep / main.d src / the other .d files include / header file (*.h) src / potential sub directories / *.c *.c main.c Makefile
obj/%.o dep/%.d: src/%.c
only is for the source files in the
src directory. But
main.c isn’t in
src so it’s not included in that rule.
You need to create a rule for
main.c as well:
obj/main.o dep/main.o: main.c
Also note that your current rule for source files also doesn’t include subdirectories of
And unless creating an actual
Makefile yourself is part of your assignment or exercise, then I recommend you use tools like CMake or Meson or similar. They will make things like handling multiple directories and dependencies much easier.