Converting arrays from signed to integer in VHDL?

I have declared an array

type datastream is array(0 to 10) of signed (5 downto 0);

For simulation, I want to display the array as integer-numbers

So I created

type  datastream_int is array(0 to 10) of integer;

and

signal DIN_ARRAY:                 datastream;
signal DIN_ARRAY_int:             datastream_int;

...

DIN_ARRAY_real <= datastream_int(DIN_ARRAY);

But it fails. How to convert it? Dont want to use a for loop

>Solution :

The numeric_std package, that I assume you are using, provides a to_integer function to convert from a single signed value to a single integer object. For an array, you’re going to have to use a for loop. Something like this:

for i in DIN_ARRAY'range loop
    DIN_ARRAY_int <= to_integer(DIN_ARRAY(i));
end loop;

You could also provide a conversion function (it will also contain a for loop)

function datastream_to_datastream_int( d : datastream ) return datastream_int is
  variable r : datastream_int;
begin
  for i in d'range loop
    r(i) := to_integer(d(i));
  end loop;

  return r;
end function;

....

--no loop required
DIN_ARRAY_int <= datastream_to_datastream_int(DIN_ARRAY);

So, there will be a for loop somewhere.

Your code fails because you have attempted a type conversion, which is only allowed between similar types – ie. array or record types where the element types match between the two types.

PS. VHDL 2008 provides an integer_vector type in the std.standard library (which is included by default) which may help by allowing you to do this:

signal DIN_ARRAY_int:  integer_vector(DIN_ARRAY'range);

If you did decide to keep datastream_int as per your original, you could type convert it to an integer_vector, because the types are similar:

my_iv <= integer_vector(DIN_ARRAY_int);