I’ve discovered the Makefile file function a few days ago and it’s perfect for what I need to do…. except there is something I can’t make sense of.
See this trivial Makefile:
FILENAME := test.txt
CONTENT := whatever
all: clean
ifneq (1, $(CLEAN))
rm -f $(FILENAME)
endif
$(file > $(FILENAME),$(CONTENT))
ls $(FILENAME)
clean:
ifeq (1, $(CLEAN))
rm -f $(FILENAME)
endif
I’ve tried different version of make, both on Linux and Windows and I consistently get this (unexpected) behavior:
make CLEAN=1 allgenerates a file as expectedmake CLEAN=0 alldoes not, although it’s (apparently at least) going through the very same steps, just re-organized between thecleanand thealltargets.
Can someone explain the mystery please ?
>Solution :
$(file ...) is a make function. rm is a shell command.
When make is getting ready to invoke a shell to run a recipe, it will expand all variables and functions in the recipe FIRST. Since $(file ...) is a make function, it’s invoked at this time.
Then after all the variables and functions are expanded, the recipe is given to the shell and the shell runs the shell commands, like rm etc.
So if you have an rm then first make creates the file due to $(file ...), then your script removes it due to rm.