Here is a simple Makefile that generates a circular dependency: test.cr <- test.cr.c test: test.cr.c cp test.cr.c test test.cr.c: test.cr cp test.cr test.cr.c Why does GNU make consider this a circular dependency? How can I avoid it? >Solution : You can use make -d to see make’s thinking. In this rule: test.cr.c: test.cr cp test.cr… Read More Can not comprehend this circular dependency in Makefile

When I run command clang++ -Wall -g -std=c++11 main.cpp in terminal the file gets compiled successfully. % clang++ -Wall -g -std=c++11 main.cpp % ./a.out s s % But when I try to do the same thing using MakeFile. I get following error. I don’t know why error occurred when same command is executed in both… Read More I am getting "error: no member named 'async' in namespace 'std' " when compiling using MakeFile

There is an existing question with a similar sounding title. However, it is not quite what I am asking. I find the following to be a typical use case: items=Excelsior Shibboleth AbraCadabra ceremony@%: foo bar biz baz $* ritual@%: ding ring bing bong $* ceremonies: $(foreach item,$(items),ceremony@$(item)) rituals: $(foreach item,$(items),ritual@$(item)) all: ceremonies | rituals However,… Read More Is it possible to dynamically generate makefile rules?

I wrote this Makefile: all: clean basedemo.exe clean: rm -f *.exe %.exe: %.s vasmm68k_mot -kick1hunks -Fhunkexe -o $@ -nosym $< My goal would be to compile every .s file in the current folder to a separate .exe. Right now, I have to append the new .exe file name to the line: all: clean basedemo.exe new_file.exe… Read More Makefile: how to avoid specifying all targets manually

I am trying to create a shared library using gcc and make. I have the following section in the Makefile to compile the shared library object: # The library build step. lib : $(DHLLOBJS) $(CC) $(XCFLAGS) $(SCFLAGS)$(SLIB).1 $(INCFLAGS) -o $(LIB_DIR)/$(SLIB).1.0 \ $(DLOPATHS) $(LNKFLAGS) ln -sf $(LIB_DIR)/$(SLIB).1.0 $(LIB_DIR)/$(SLIB).1 ln -sf $(LIB_DIR)/$(SLIB).1.0 $(LIB_DIR)/$(SLIB) The above doesn’t throw… Read More Shared object creation: dangling symlink using make

I’m often creating png files out of dot (graphviz format) files. The command to do so is the following: $ dot my_graph.dot -o my_graph.png -Tpng However, I would like to be able to have a shorter command format like $ make my_graph.dot to automatically generate my png file. For the moment, I’m using a Makefile… Read More Is there a way to define custom implicit GNU Make rules?

First: I’m pretty new to linux and I’m already sorry for asking a probably dumb question. I have a makefile that compiles a latex text into a pdf. That creates a logfile and I have to search for a string in that log file and compile again if the string is in the log-file. So… Read More Use grep in a GNU make if-statement

Suppose I define a runners.mk file: run=./ valgrind=valgrind –this –or –that-option And intentionally put a space at the end of the valgrind line. The idea is to use any "runner" in the same way: valgrind-foo-bar-executable: foo-bar-executable $(valgrind)$< run-foo-bar-executable: foo-bar-executable $(run)$< So that I can eventually abstract everything into a runner pattern with matching (once I… Read More How to encode a string with a space at the end in a protected manner in a makefile?

I have written the following make file all: writer.o writer.o: gcc -Wall writer.c -o writer clean: rm *.o How do I add a functionality to this make file such that I am able to generate an application for the native build platform when GNU make variable CROSS_COMPILE is not specified on the make command line.However,… Read More How to cross compile for ARM on Ubuntu conditionally?

I’m trying to get this shell script to work in make: $ VERSION=$(echo ‘ThisBuild / version := "1.20"’ | grep -e ‘This.*version’ | grep -Eo ‘[0-9]+\.[0-9]+’) $ echo $VERSION 1.20 make: $ make -v GNU Make 4.2.1 Built for x86_64-pc-linux-gnu Makefile: version: VERSION=$(echo ‘ThisBuild / version := "1.20"’ | grep -e ‘This.*version’ | grep -Eo… Read More Assign results of a bash command to a variable in make